Teensy 3.5

Teensy 3.5 is an upgrade to the Teensy 3.2.

Features:

• 32 bit ARM Cortex-M4 120 MHz CPU with floating point unit
• Flash Memory: 512K Flash Memory
• RAM: 192K
• EEPROM: 4K
• 62 I/O Pins (42 breadboard friendly)
• 25 Analog Inputs to 2 ADCs with 13 bits resolution
• 2 Analog Outputs (DACs) with 12 bit resolution
• 20 PWM Outputs (Teensy 3.6 has 22 PWM)
• Supports SPI, I2C, I2S, CAN Bus
• I2S high quality audio interface
• Real Time Clock
• 16 DMA channels
• 5 Volt Tolerance On All Digital I/O Pins
• USB Full Speed (12 Mbit/sec) Port
• Ethernet mac, capable of full 100 Mbit/sec speed
• Native (4 bit SDIO) micro SD card port
• I2S Audio Port, 4 Channel Digital Audio Input & Output
• 14 Hardware Timers
• Cryptographic Acceleration Unit
• Random Number Generator
• CRC Computation Unit
• 6 Serial Ports (2 with FIFO & Fast Baud Rates)
• 3 SPI Ports (1 with FIFO)
• 3 I2C Ports (Teensy 3.6 has a 4th I2C port)